The present invention relates to a driving circuit for a semiconductor device capable of conducting a switching operation with a high voltage, high current and high speed.
FIG. 2 is a circuit diagram showing an equivalent circuit of a cascode type BiMOS switch 1 as a driven device. Referring to FIG. 2, the cascode type BiMOS switch 1 includes a bipolar transistor 2 whose collector is connected to a collector terminal T1, a power metal-oxide-semiconductor field effect transistor 3 (which will be hereinafter referred to as a power MOSFET) as a field effect transistor whose drain is connected to an emitter of the bipolar transistor 2 and whose source is connected to a source terminal T2, and a free-wheel diode 4 whose cathode is connected to the collector terminal T1 and whose anode is connected to the source terminal T2.
As the power MOSFET 3 is provided for the purpose of power supply, it is selected from n-channel type low-voltage (V.sub.DSS .apprxeq.50V) low on-resistance devices. The bipolar transistor is an npn power transistor having a high voltage resistance. While the bipolar transistor 2 may be of a Darlington type, it is preferably a single transistor capable of providing a high-speed operation. An emitter terminal of the bipolar transistor 2 is connected to a drain terminal of the power MOSFET 3 to form a series body of the bipolar transistor 2 and the power MOSFET 3.
FIG. 3 is a circuit diagram of a conventional driving circuit for driving the cascode type BiMOS switch 1. Referring to FIG. 3, the driving circuit includes a D.C. power source 5 whose positive electrode is connected through a load 6 to the collector terminal T1 and whose negative electrode is connected to the source terminal T2, a Zener diode 7, an input terminal T3 connected to the base of the bipolar transistor 2, and an input terminal T4 connected to the gate of the power MOSFET 3.
The operation of the driving circuit will be now described. First, in a turn-on operation, positive signals are simultaneously applied to the base of the bipolar transistor 2 and the gate of the power MOSFET 3. In this case, it is necessary to supply a base current dependent on the formula (1) to the base of the bipolar transistor 2. EQU I.sub.c /h.sub.FE .ltoreq.I.sub.B ( 1)
On the other hand, a gate voltage dependent on the formula (2) is applied to the gate of the power MOSFET 3. EQU I.sub.c /g.sub.m .ltoreq.V.sub.GS ( 2)
When the two signals satisfying the formulas (1) and (2) are applied, the cascode type BiMOS switch 1 is turned on to deliver current from the D.C. power source 5 through the load 6.
Next, in a turn-off operation, when the signals to both the transistors 2 and 3 are cut off at the same time, the power MOSFET 3 is turned off earlier than the bipolar transistor 2 in general. Accordingly, the emitter of the bipolar transistor 2 is cut off, and a carrier stored in the collector is discharged through the base 2 of the bipolar transistor 2 and the Zener diode 7. Thus, the turn-off operation of the cascode type BiMOS switch 1 is completed.
The conventional driving circuit for the cascode type BiMOS switch 1 has the two signal input terminals T3 and T4, and accordingly, it is necessary to independently carry out current control and voltage control, causing complicated timing of the controls.